AON6484 100v n-channel mosfet general description product summary v ds i d (at v gs =10v) 12a r ds(on) (at v gs =10v) < 79m w r ds(on) (at v gs = 4.5v) < 90m w 100% uis tested 100% r g tested symbol v ds the AON6484 combines advanced trench mosfet technology with a low resistance package to provide extremely low r ds(on) .this device is ideal for boost converters and synchronous rectifiers for consumer, telecom, industrial power supplies and led backligh ting. v maximum units parameter absolute maximum ratings t a =25c unless otherwise noted 100v drain-source voltage 100 g ds top view 12 3 4 87 6 5 pin1 dfn5x6 top view bottom view v ds v gs i dm i as , i ar e as , e ar t j , t stg symbol t 10s steady-state steady-state r q jc maximum junction-to-case c/w c/w maximum junction-to-ambient a d 3.5 60 5 t c =25c t c =100c w power dissipation a p dsm w t a =70c 25.0 1.3 t a =25c power dissipation b p d avalanche energy l=0.1mh c mj avalanche current c 2.7 v c i dsm a t a =70c continuous drain current 10 3.3 a 14 v 20 gate-source voltage drain-source voltage 100 c/w r q ja 21 50 27 25 thermal characteristics units maximum junction-to-ambient a a t a =25c pulsed drain current c continuous drain current g i d 12.0 7.5 parameter typ max t c =25c 2 10.0 t c =100c junction and storage temperature range -55 to 150 g ds top view 12 3 4 87 6 5 pin1 dfn5x6 top view bottom view rev 0: sep 2010 www.aosmd.com page 1 of 6
AON6484 symbol min typ max units bv dss 100 v v ds =100v, v gs =0v 1 t j =55c 5 i gss 100 na v gs(th) gate threshold voltage 1.6 2.2 2.7 v i d(on) 27 a 63.5 79 t j =125c 122 151 70 90 m w g fs 34 s v sd 0.74 1 v i s 25 a c iss 620 778 942 pf c oss 38 55 81 pf c rss 13 24 35 pf r g 0.7 1.45 2.2 w q g (10v) 15 19.4 24 nc q g (4.5v) 7 9.6 12 nc q gs 2.4 3 3.6 nc q gd 3 5 7 nc t d(on) 6 ns electrical characteristics (t j =25c unless otherwise noted) static parameters parameter conditions drain-source breakdown voltage on state drain current i d =250 m a, v gs =0v v gs =10v, v ds =5v v gs =10v, i d =7.5a r ds(on) static drain-source on-resistance i dss m a v ds =v gs i d =250 m a v ds =0v, v gs = 20v zero gate voltage drain current gate-body leakage current m w i s =1a,v gs =0v v ds =5v, i d =7.5a v gs =4.5v, i d =5a forward transconductance diode forward voltage maximum body-diode continuous current input capacitance output capacitance turn-on delaytime dynamic parameters reverse transfer capacitance v gs =0v, v ds =50v, f=1mhz switching parameters gate resistance v gs =0v, v ds =0v, f=1mhz total gate charge v gs =10v, v ds =50v, i d =7.5a gate source charge gate drain charge total gate charge d(on) t r 2.5 ns t d(off) 21 ns t f 2.4 ns t rr 16 23 30 ns q rr 99 142 185 nc this product has been designed and qualified for th e consumer market. applications or uses as critical components in life support devices or systems are n ot authorized. aos does not assume any liability ar ising out of such applications or uses of its products. aos reserves the right to improve product design, functions and reliability without notice. body diode reverse recovery time body diode reverse recovery charge i f =7.5a, di/dt=500a/ m s turn-on rise time turn-off delaytime i f =7.5a, di/dt=500a/ m s v gs =10v, v ds =50v, r l =6.6 w , r gen =3 w turn-off fall time a. the value of r q ja is measured with the device mounted on 1in 2 fr-4 board with 2oz. copper, in a still air environ ment with t a =25 c. the power dissipation p dsm is based on r q ja and the maximum allowed junction temperature of 150 c. the value in any given application depends on the user's specific board design. b. the power dissipation p d is based on t j(max) =150 c, using junction-to-case thermal resistance, and i s more useful in setting the upper dissipation limit for cases where additional heatsi nking is used. c. repetitive rating, pulse width limited by juncti on temperature t j(max) =150 c. ratings are based on low frequency and duty cycl es to keep initial t j =25 c. d. the r q ja is the sum of the thermal impedence from junction t o case r q jc and case to ambient. e. the static characteristics in figures 1 to 6 are obtained using <300 m s pulses, duty cycle 0.5% max. f. these curves are based on the junction-to-case t hermal impedence which is measured with the device mounted to a large heatsink, assuming a maximum junction temperature of t j(max) =150 c. the soa curve provides a single pulse rating. g. the maximum current rating is package limited. h. these tests are performed with the device mounte d on 1 in 2 fr-4 board with 2oz. copper, in a still air environ ment with t a =25 c. rev 0: sep 2010 www.aosmd.com page 2 of 6
AON6484 typical electrical and thermal characteristics 17 52 10 0 18 0 5 10 15 20 0 1 2 3 4 5 6 i d (a) v gs (volts) figure 2: transfer characteristics (note e) 50 60 70 80 90 100 0 5 10 15 20 r ds(on) (m w ww w ) i d (a) figure 3: on-resistance vs. drain current and gate voltage (note e) 0.8 1.2 1.6 2.0 2.4 2.8 0 25 50 75 100 125 150 175 200 normalized on-resistance temperature (c) figure 4: on-resistance vs. junction temperature (note e) v gs =4.5v i d =5a v gs =10v i d =7.5a 25 c 125 c v ds =5v v gs =4.5v v gs =10v 0 5 10 15 20 0 1 2 3 4 5 i d (a) v ds (volts) fig 1: on-region characteristics (note e) v gs =3v 4.5v 10v 3.5v 40 0 5 10 15 20 0 1 2 3 4 5 6 i d (a) v gs (volts) figure 2: transfer characteristics (note e) 50 60 70 80 90 100 0 5 10 15 20 r ds(on) (m w ww w ) i d (a) figure 3: on-resistance vs. drain current and gate voltage (note e) 1.0e-05 1.0e-04 1.0e-03 1.0e-02 1.0e-01 1.0e+00 1.0e+01 1.0e+02 0.0 0.2 0.4 0.6 0.8 1.0 1.2 i s (a) v sd (volts) figure 6: body-diode characteristics (note e) 25 c 125 c 0.8 1.2 1.6 2.0 2.4 2.8 0 25 50 75 100 125 150 175 200 normalized on-resistance temperature (c) figure 4: on-resistance vs. junction temperature (note e) v gs =4.5v i d =5a v gs =10v i d =7.5a 50 70 90 110 130 150 2 4 6 8 10 r ds(on) (m w ww w ) v gs (volts) figure 5: on-resistance vs. gate-source voltage (note e) 25 c 125 c v ds =5v v gs =4.5v v gs =10v i d =7.5a 25 c 125 c 0 5 10 15 20 0 1 2 3 4 5 i d (a) v ds (volts) fig 1: on-region characteristics (note e) v gs =3v 4.5v 10v 3.5v rev 0: sep 2010 www.aosmd.com page 3 of 6
AON6484 typical electrical and thermal characteristics 17 52 10 0 18 0 2 4 6 8 10 0 5 10 15 20 v gs (volts) q g (nc) figure 7: gate-charge characteristics 0 200 400 600 800 1000 1200 0 20 40 60 80 100 capacitance (pf) v ds (volts) figure 8: capacitance characteristics c iss 1 10 100 1000 10000 0.00001 0.0001 0.001 0.01 0.1 1 10 power (w) pulse width (s) figure 10: single pulse power rating junction-to- case (note f) c oss c rss v ds =50v i d =7.5a t j(max) =150 c t c =25 c 10 m s 0.0 0.1 1.0 10.0 100.0 0.01 0.1 1 10 100 i d (amps) v ds (volts) figure 9: maximum forward biased safe operating area (note f) 10 m s 10ms 1ms dc r ds(on) limited t j(max) =150 c t c =25 c 100 m s 40 0 2 4 6 8 10 0 5 10 15 20 v gs (volts) q g (nc) figure 7: gate-charge characteristics 0 200 400 600 800 1000 1200 0 20 40 60 80 100 capacitance (pf) v ds (volts) figure 8: capacitance characteristics c iss 1 10 100 1000 10000 0.00001 0.0001 0.001 0.01 0.1 1 10 power (w) pulse width (s) figure 10: single pulse power rating junction-to- case (note f) 0.001 0.01 0.1 1 10 1e-05 0.0001 0.001 0.01 0.1 1 10 z q qq q jc normalized transient thermal resistance pulse width (s) figure 11: normalized maximum transient thermal imp edance (note f) c oss c rss v ds =50v i d =7.5a single pulse d=t on /t t j,pk =t c +p dm .z q jc .r q jc t on t p d in descending order d=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse t j(max) =150 c t c =25 c 10 m s 0.0 0.1 1.0 10.0 100.0 0.01 0.1 1 10 100 i d (amps) v ds (volts) figure 9: maximum forward biased safe operating area (note f) 10 m s 10ms 1ms dc r ds(on) limited t j(max) =150 c t c =25 c 100 m s r q jc =5 c/w rev 0: sep 2010 www.aosmd.com page 4 of 6
AON6484 typical electrical and thermal characteristics 17 52 10 0 18 0 5 10 15 20 25 30 0 25 50 75 100 125 150 power dissipation (w) t case (c) figure 13: power de-rating (note f) 0 3 6 9 12 15 0 25 50 75 100 125 150 current rating i d (a) t case (c) figure 14: current de-rating (note f) 1 10 100 1000 10000 1e-05 0.001 0.1 10 1000 power (w) pulse width (s) figure 15: single pulse power rating junction-to- ambient (note h) t a =25 c 1.0 10.0 100.0 1 10 100 1000 i ar (a) peak avalanche current time in avalanche, t a ( m mm m s) figure 12: single pulse avalanche capability (note c) t a =25 c t a =150 c t a =100 c t a =125 c 40 0.001 0.01 0.1 1 10 1e-05 0.0001 0.001 0.01 0.1 1 10 100 1000 z q qq q ja normalized transient thermal resistance pulse width (s) figure 16: normalized maximum transient thermal imp edance (note h) single pulse d=t on /t t j,pk =t a +p dm .z q ja .r q ja t on t p d in descending order d=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse 0 5 10 15 20 25 30 0 25 50 75 100 125 150 power dissipation (w) t case (c) figure 13: power de-rating (note f) 0 3 6 9 12 15 0 25 50 75 100 125 150 current rating i d (a) t case (c) figure 14: current de-rating (note f) 1 10 100 1000 10000 1e-05 0.001 0.1 10 1000 power (w) pulse width (s) figure 15: single pulse power rating junction-to- ambient (note h) t a =25 c r q ja =60 c/w 1.0 10.0 100.0 1 10 100 1000 i ar (a) peak avalanche current time in avalanche, t a ( m mm m s) figure 12: single pulse avalanche capability (note c) t a =25 c t a =150 c t a =100 c t a =125 c rev 0: sep 2010 www.aosmd.com page 5 of 6
AON6484 - + vdc ig vds dut - + vdc vgs vgs 10v qg qgs qgd charge gate charge test circuit & waveform - + vdc dut vdd vgs vds vgs rl rg vgs vds 10% 90% resistive switching test circuit & waveforms t t r d(on) t on t d(off) t f t off id + l vgs vds bv unclamped inductive switching (uis) test circuit & waveforms vds dss 2 e = 1/2 li ar ar - + vdc ig vds dut - + vdc vgs vgs 10v qg qgs qgd charge gate charge test circuit & waveform - + vdc dut vdd vgs vds vgs rl rg vgs vds 10% 90% resistive switching test circuit & waveforms t t r d(on) t on t d(off) t f t off vdd vgs id vgs rg dut - + vdc l vgs vds id vgs bv i unclamped inductive switching (uis) test circuit & waveforms ig vgs - + vdc dut l vds vgs vds isd isd diode recovery test circuit & waveforms vds - vds + i f ar dss 2 e = 1/2 li di/dt i rm rr vdd vdd q = - idt ar ar t rr rev 0: sep 2010 www.aosmd.com page 6 of 6
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